DiLinKer MCIO x8 to MCIO x8, SFF-TA-1016 74Pin to SFF-TA-1016 74Pin PCIe Gen5 Mini Cooledge IO Cable, 80cm (CBL-MCIO-1232M5)
DiLinKer MCIO x8 to MCIO x8, SFF-TA-1016 74Pin to SFF-TA-1016 74Pin PCIe Gen5 Mini Cooledge IO Cable, 80cm (CBL-MCIO-1232M5)
A straight PCIe 5.0 internal cable with an MCIO 8x connector (SFF-TA-1016, 74-pin) on both ends. All eight lanes pass through at 32 GT/s per lane, which makes the CBL-MCIO-1232M5 the default run between a current-generation board and anything that presents MCIO on the device side — Gen5 NVMe backplanes, front-panel adapters and MCIO-based drive enclosures.
Why this cable
- PCIe 5.0 rated, 32 GT/s per lane. A full x8 link with headroom for Gen5 NVMe devices; backward compatible with Gen4 and Gen3.
- Same standard on both ends. SFF-TA-1016 74-pin to SFF-TA-1016 74-pin — a direct board-to-device run.
- 80 cm internal reach. Long enough for front-header to rear-cage routing in most chassis.
- Double straight assembly. Connectors leave in-line for clean, low-crosstalk routing.
- Passive and maintenance-free. No power, no firmware, no drivers.
Specifications
| Connectors | MCIO 8x, SFF-TA-1016, 74-pin (both ends) |
| Lane configuration | 8 lanes, 1:1 pass-through |
| Interface speed | PCIe 5.0, up to 32 GT/s per lane |
| Protocol | PCIe, as determined by the host port |
| Length | 80 cm / 31.5 in |
| Part number | CBL-MCIO-1232M5 |
| SKU | B0CBBNR2K8 |
| Warranty | 24 months |
Compatibility
Works with
- Boards and backplanes with MCIO 8x (SFF-TA-1016) 74-pin ports.
- Gen5 NVMe backplanes and MCIO-based U.2 adapters.
- PCIe 4.0 and 3.0 MCIO equipment — links negotiate down automatically.
Does not work with
- SFF-TA-1016 38-pin (x4) ports — this cable is the 74-pin 8x assembly.
- SlimSAS (SFF-8654) ports without a cross-standard cable.
- Drives connected directly — the far end must meet a port on a backplane, cage or adapter.
Typical deployments
- Board to backplane. The standard Gen5 run from MCIO board headers to an NVMe backplane.
- Front-panel NVMe bays. MCIO headers feeding front U.2/MCIO bays over 80 cm.
- JBOF and enclosure links. Internal x8 runs inside MCIO-based enclosures.
Frequently asked questions
What is MCIO?
MCIO (Mini Cool Edge IO) is SFF-TA-1016, the internal storage connector standard designed around PCIe 5.0. The 74-pin 8x plug carries eight lanes; a 38-pin 4x plug carries four.
Can I use this to split one x8 port into two x4 devices?
No — both ends are a single 8x connector and all eight lanes go straight through. For a lane split, use the MCIO x8 to 2×MCIO x4 or MCIO x8 to 2×SlimSAS x4 cables.
Does it matter which end goes to the board?
Electrically no — the assembly is symmetric. Route whichever end reaches your header more cleanly, and keep the run away from sharp metal edges.
Is 80 cm safe for PCIe 5.0?
Yes, within typical internal routing. Keep bends gentle, avoid running parallel to power cables, and the link will train at full width and speed.
In the box
- 1 × MCIO x8 to MCIO x8 cable, 80 cm (CBL-MCIO-1232M5, SKU B0CBBNR2K8)
Backed by a 24-month warranty. If a link trains at reduced width or does not appear, contact us with your controller and device models and we will help you isolate the cause.
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